| Single bus interface |
| Form factor | - Single-slot PCIe Gen3
- Mechanically x16 - Electrically x8 - Half-length, full-height card
- Subfield/subframe transfers between I/O and host memory for ultra-low latency in-to-out delay
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| Video inputs and outputs |
| Video formats | - SDI I/O:
- X.mio5/X2: 4x 12G inputs and 4x 12G outputs and 4x reconfigurable 3G I/O, or 12x 3G reconfigurable SDI I/O - X.mio5/8: 4x 12G inputs and 4x 12G outputs, or 8x 3G reconfigurable SDI I/O - HD SDI in accordance with SMPTE ST 292 (HD)
- 1080i at 25, 29.97, and 30 fps - 720p at 50, 59.94, and 60 fps - 1080p/PsF at 23.98, 24, 25, 29.97, and 30 fps - 3G SDI in accordance with SMPTE ST 424, ST 425 - 1 (Level A and Level B - DL), ST 425-5
- 1920x1080p at 47.95, 48, 50, 59.94, and 60 fps - 2048x1080p at 47.95, 48, 50, 59.94, and 60 fps - 3840x2160p at 47.95, 48, 50, 59.94, and 60 fps - 4096x2160p at 47.95, 48, 50, 59.94, and 60 fps - 6G SDI in accordance with SMPTE ST 2081
- 3840x2160p at 23.98, 24, 25, 29.97, and 30 fps - 4096x2160p at 23.98, 24, 25, 29.97, and 30 fps - 12G SDI in accordance with SMPTE ST 2082 and SMPTE ST 2082-12
- 3840x2160p at 47.95, 48, 50, 59.94, and 60 fps - 4096x2160p at 47.95, 48, 50, 59.94, and 60 fps - 7680x4320p at 47.95, 48, 50, 59.94, and 60 fps - 8132x4320p at 47.95, 48, 50, 59.94, and 60 fps
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| Video formats | - 8- and 10-bit YUV 4:2:2
- SDI inputs and outputs can be a video or key, where the key inputs and outputs can be expanded
and inverted - Simultaneous inputs and output of different video standards
- Auto-detection of input video standards
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| Embedded audio inputs and outputs |
| Audio format | - Supports up to 16 channels of embedded audio per SDI video stream in accordance with
ST 272M A, B, and C (SD) and ST 299M (HD) - 48 kHz sampling
- Supports 16-, 20-, and 24-bit audio streams
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| Ancillary data inputs and outputs |
| Ancillary data | - Independent horizontal and vertical timing presets for each video output
- Generic support of VANC
- Support for HANC packets (SMPTE ST 12M-2 and SMPTE ST 352)
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| Input and Output modes |
| Low latency capture | - Subfield/subframe transfers between I/O and host memory for ultra-low latency in-to-out delay
- Asynchronous capture for multi-rate families
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| Built-in frame synchronizers | - Up to 12 frame synchronizers
- Corrects timebase of inputs to the genlock source
- 16 channels of audio resampling per input
- Can be optionally bypassed
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| Onboard Processing |
| Proxy scaler | - Proxy generation of any I/O buffer
- Provides 1/2, 1/4 or 1/8 decimation
- Simultaneous capture of full resolution and decimated buffers from I/O memory
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| Color space conversions | - YUV/YUVA to ARGB from I/O to host memory
- ARGB to YUV/YUVA from host to I/O memory
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| Scaler | - Sub-pixel scaling, positioning, and cropping
- Down, up, and cross scaling
- Full-blend and half-blend mixing
- Shaped or unshaped video compositing
- Supports custom resolutions and broadcast resolutions
- Logo input support with pixel-based positioning
- X.mio5/X2: Up/Downscaling/HDR Conversion* of 4 channels of 4K/UHDp60 or the equivalent
- such as 32 channels of 1080i30 - X.mio5/8: 2 layers of 4K/UHDp60 compositing or the equivalent
- such as 16 channels of 1080i30
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| In-line mixer | - 4x 12G live mixers
- Zero frame delay
- 8- and 10-bit video
- Downstream mixing of live video with host buffers
- Mixing of 16 tracks of live embedded audio with host audio
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| Motion adaptive de-interlacer | - Pixel based operation
- Temporal and spacial-based motion estimation
- Anti-aliasing filtering
- 10-bit processing
- X.mio5/X2: De-interlacing of up to 8 channels of 1080i30 to 1080p60 or the equivalent
- X.mio5/8: De-interlacing of 2 channels of 1080i30 to 1080p60 or the equivalent
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| Multi-layer compositor | - Programmable in single or multiple compositor configurations
- 8- and 10-bit video
- Full-blend and half-blend mixing
- Shaped or unshaped video compositing
- Supports custom resolutions and broadcast resolutions
- Logo input support with pixel-based positioning
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| Genlock time base |
| Genlock | - Analog blackburst reference (tri-level or bi-level) or SDI input as reference
- Optional latching termination
- Auto detection of genlock standard
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| LTC Input |
| LTC | - Unbalanced LTC input in accordance with ST 12M-1
- Available on MCX connector (optional MCX to BNC adaptor bracket available)
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